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| STL8NH3LL N-CHANNEL 30 V - 0.012 - 8 A PowerFLATTM ULTRA LOW GATE CHARGE STripFETTM MOSFET PRELIMINARY DATA Table 1: General Features TYPE STL8NH3LL s s s s s s Figure 1: Package RDS(on) < 0.015 ID (1) 8A VDSS 30 V TYPICAL RDS(on) = 0.012 @ 10V IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE (1mm MAX) VERY LOW THERMAL RESISTANCE VERY LOW GATE CHARGE LOW THRESHOLD DEVICE PowerFLATTM(3.3x3.3) DESCRIPTION This application specific MOSFET is the lastest generation of STMicroelectronics unique "STripFETTM" technology. The resulting transistor is optimized for low on-resistance and minimal gate charge. The Chip-scaled PowerFLATTM package allows a significant board space saving, still boosting the performance. (Chip Scale Package) Figure 2: Internal Schematic Diagram APPLICATIONS s CONTROL FET IN BUCK CONVERTER TOP VIEW Table 2: Order Codes Part Number STL8NH3LL Marking L8NH3LL Package PowerFLATTM (3.3x3.3) Packaging TAPE & REEL Rev 2 October 2004 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice 1/7 STL8NH3LL Table 3: Absolute Maximum ratings Symbol VDS VDGR VGS ID (1) ID (2) IDM (3) PTOT (1) PTOT (2) Tstg Tj Parameter Drain-source Voltage (VGS= 0) Drain-gate Voltage (RGS= 20 k) Gate- source Voltage Drain Current (continuous) at TC= 25C (Steady State) Drain Current (continuous) at TC= 100C (Steady State) Drain Current (pulsed) Total Dissipation at TC= 25C Total Dissipation at TC= 25C (Steady State) Derating Factor (2) Storage Temperature Max. Operating Junction Temperature Value 30 30 16 8 5 32 50 1.56 0.4 - 55 to 150 Unit V V V A A A W W W/C C Table 4: Thermal Data Rthj-Case Rthj-a (4) Thermal Resistance Junction-Case Max Thermal Operating Junction-ambient 2.5 80 C/W C/W ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 5: On /Off Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125C VGS = 16 V VDS = VGS, ID = 250 A VGS = 10 V, ID = 4 A VGS = 4.5 V, ID = 4 A 1 0.012 0.0135 0.015 0.017 Min. 30 1 10 100 Typ. Max. Unit V A A nA V Table 6: Dynamic Symbol gfs (5) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15V, ID= 4A VDS= 25V, f= 1 MHz, VGS= 0 Min. Typ. TBD 965 285 38 Max. Unit S pF pF pF 2/7 STL8NH3LL ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Switching On Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD= 15 V, ID= 4 A RG = 4.7, VGS = 4.5V (see Figure 3) VDD= 15V, ID= 8 A, VGS= 4.5 V (see Figure 5) Min. Typ. 15 32 9 3.7 3 12 Max. Unit ns ns nC nC nC Table 8: Switching Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions VDD= 15 V, ID= 4 A, RG= 4.7, VGS= 4.5 V (see Figure 3) Min. Typ. 18 8.5 Max. Unit ns ns Table 9: Source Drain Diode Symbol ISD ISDM(3) VSD (5) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 8 A, VGS = 0 ISD = 8 A, di/dt = 100 A/s VDD = 20V, Tj = 150C (see Figure 4) 24 17.4 1.45 Test Conditions Min. Typ. Max. 8 32 1.3 Unit A A V ns nC A (1) The value is rated according Rthj-c (2) The value is rated according Rthj-a (3) Pulse width limited by safe operating area. (4) When mounted on minimum footprint (5) Pulsed: Pulse duration = 300 s, duty cycle 1.5 % 3/7 STL8NH3LL Figure 3: Switching Times Test Circuit For Resistive Load Figure 5: Gate Charge Test Circuit Figure 4: Test Circuit For Diode Recovery Times 4/7 STL8NH3LL PowerFLATTM (3.3x3.3) MECHANICAL DATA mm. DIM. MIN. A A1 A3 b C C1 D D2 E E2 F F1 e L 0.30 1.25 2.50 0.23 0.80 TYP 0.90 0.02 0.20 0.30 0.328 0.12 3.30 2.65 3.30 1.40 1.325 0.975 0.65 0.50 0.011 1.50 0.049 2.75 0.098 0.38 0.009 MAX. 1.00 0.05 MIN. 0.031 TYP. 0.035 0.0007 0.007 0.011 0.012 0.004 0.13 0.104 0.13 0.055 0.052 0.038 0.025 0.019 0.059 0.108 0.015 MAX. 0.039 0.0019 inch 5/7 STL8NH3LL Table 10: Revision History Date 21-July-2004 05-Oct-2004 Revision 1 2 First Release. Values changed Description of Changes 6/7 STL8NH3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 7/7 |
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